Revision 4 - July 2009
This Application Note tells you how to configure the Keil 8051 development tools for Evatronix R8051XC/R8051XC2 based devices. The R8051XC/R8051XC2 is a highly configurable IP core that provides many extensions such as configurable DPTR registers, MDU, and a flexible set of peripherals.
Information in this file, the accompany manuals, and software is
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All rights reserved.
This application note describes the configuration features for the Evatronix R8051XC/R8051XC2 CPU core that are available in the Keil PK51 Professional Developer's Kit.
NOTE:
The µVision Device Database allows you to create custom devices that simplifies the configuration tool configuration. The article UVISION: ADDING CUSTOM PARTS TO THE DEVICE DATABASE explains the various configuration options.
The string CPU= configures the memory sizes of the device and specific options such as MDU or multiple DPTR. The following options are relevant for the R8051XC/R8051XC2:
The string SIM= configures the CPU and Peripheral simulation DLLs. For the R8051XC/R8051XC2 device you need to use the DLL's S8051.DLL and DCore51.DLL with the parameter -pR8051XC or -pR8051XC2. Additional parameters are described in the next section Simulator Configuration.
Sample configuration options:
CPU=IRAM(0-0x7F) CLOCK(12000000) MOD517DP MDU_R515
SIM=S8051.DLL("-PMW -DPC -BSE") DCore51.DLL("-pR8051XC")
The R8051XC/R8051XC2 device provides auto-increment features and automatic saving of the multiple DPTR register banks. When using the C51 directive BSE, the compiler does no longer save the DPTR registers when switching register banks. When using this feature together with the MOD517 directive, the C51 Compiler uses the auto-increment features with the C51 library functions memcpy, memcmp, memmove, strcpy, and strcmp.
The R8051XC/R8051XC2 device is simulated with the CPU DLL S8051.DLL and the Dialog DLL DCore51.DLL. These DLL provide several parameters that provide configuration features for the device. The parameters may be entered in the µVision dialog page Options for Target - Debug. When you select a device from the device database, the DLL parameters are copied from the string SIM= as described in the previous section Device Database Configuration.
| Bit | Description |
|---|---|
| 0 | Port 0 |
| 1 | Port 1 |
| 2 | Port 2 |
| 3 | Port 3 |
| 4 | Timer 0 |
| 5 | Timer 1 |
| 6 | Timer 2 |
| 7 | UART 0 |
| 8 | UART1 |
| 9 | PMU (Power Management Unit) |
| 10 | PMW (Program Memory Write) |
| 11 | MDU (Multiplication/Division Unit) |
| 12 | CKCON (Clock Control) |
| 13 | Watchdog |
| 15-14 | 00: No Interrupt Controller 01: 8051 compatible, 2-level 10: 80515 compatible, 4 level 11: invalid |
| 17-16 | 00: no DPTR 01: one DPTR 10: two DPTR (implies device database string CPU=MODC2) 11: eight DPTR (implies device database string CPU=MOD517DP) |
| 18 | DPTR auto increment |
| 19 | I2C |
| 20 | SPI |
| 24-21 | 0000: no external interrupt 0001: 1 external interrupt 0010: 2 external interrupts 0011: 3 external interrupts : 1100: 12 external interrupts 1101: 13 external interrupts |
| 25 | Disable MUL instruction |
| 26 | Disable DIV instruction |
| 27 | Disable DA instruction |
| 30-28 | 000: no additional address lines (16 bit
address, no code banking) 001: 1 additional address line 010: 2 additional address line : 111: 7 additional address line |
| 31 | Second I2C |
| 32-35 | Prescaler width for extended watchdog timer 0000: no additional prescaler (standard watchdog timer) 0001: 1-bit prescaler (divide by 2) 0010: 2-bit prescaler (divide by 4) 0011: 3-bit prescaler (divide by 8) : : 0111: 7-bit prescaler (divide by 128) 1000: 8-bit prescaler (divide by 256) other values are reserved |
| 36-39 | Number of DMA channels 0000: DMA controller disabled 0001: 1 DMA channel 0010: 2 DMA channel : : 0111: 7 DMA channel 1000: 8 DMA channel other values are reserved |
| 40 | Software Reset |
| 41 | RTC (Real Time Clock) |
| 42-63 | unused |
Configuration parameter examples for the DCore51.DLL:
NOTE:
The table below lists additional virtual registers (VTR), their size, range, default value and their meaning for the simulation.
| VTR | Size | Range | Default Value | Description |
|---|---|---|---|---|
| RTC_CLK | 32 Bit | 32768 Hz | External Clock for RTC | |
| RTC_SUBSEC | 8 Bit | 0 - 255 | 0 | RTC Subsecond counter |
| RTC_SEC | 8 Bit | 0 - 59 | 0 | RTC Second counter |
| RTC_MIN | 8 Bit | 0 - 59 | 0 | RTC Minute counter |
| RTC_HOUR | 8 Bit | 0 - 23 | 0 | RTC Hour counter |
| RTC_DOW | 8 Bit | 0 - 7 | 0 | RTC Day of Week counter (0: off; 1 - 7: Monday - Sunday) |
| RTC_DAY | 16 Bit | 0 - 65536 | 0 | RTC Day counter |
| RTC_RESET | 8 Bit | 0 - 1 | 0 | Writing 1 to RTC_RESET causes a RTC reset |
Example programs in the folder ..\C51\EXAMPLES\R8051XC demonstrate some features of the Evatronix R8051XC core. All programs can be fully simulated with the uVision Debugger.
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