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Toshiba TMPM376FDFG

The Toshiba TMPM376FDFG is an ARM Cortex-M3 microprocessor core (r2p0) Little endian Maximum operating frequency: 80 MHz On Chip program memory and data memory On-chip FlashROM: 512 Kbyte On-chip RAM: 32 Kbyte 16-bit timer (TMRB) 8 channels - 16-bit interval timer mode - 16-bit event counter mode - Input capture function - External trigger PPG output Watchdog timer (WDT): 1 channel - WDT generates a reset or a non-maskable interrupt(NMI) Power_On reset function (POR) Voltage detect function (VLTD) Oscillation frequency detect function (OFD) Vector engine (VE) 1unit - Calculation circuit for motor control - Corresponding to 2 motors Programmable motor driver (PMD) 2 channels - 3phase complementary PWM generator - Synchronous AD convert start trigger generator - Emergency protective function (EMG) Encoder input circuit (ENC) 2 channels - Correspond to incremental encoder (AB / ABZ) - Rotation direction detection - Counter for absolute position detection - Comparator for position detection - Noise filter - 3phase sensor input General-purpose serial interface(SIO/UART) 4 channels - Either UART mode or synchronous mode can be selected Serial bus interface (I2C/SIO) 1 channel - Either I2C bus mode or synchronous mode can be selected. 12 bit AD converter (ADC) 2 units (22channel for analog input) - Start by the internal trigger: TMRB interrupt / PMD trigger - Constant conversion mode - AD monitoring 2ch Input/ output ports (PORT) 82 pins - I/O pin: 80 pins - Input pin: 2 pins Interrupt source - Internal: 63 - External: 16 Standby mode: IDLE, STOP Clock generator (CG) - On-chip PLL (8x) - Clock gear function: high-speed clock can be divided into 1/1, 1/2, 1/4, 1/8 or 1/16 Internal high-speed oscillation circuit Debug interface JTAG / SWD / SWV / TRACE (DATA 4bit).

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Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Generic User Guide
1,364,135 bytes
Technical Reference Manual
2,467,498 bytes

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Header Files
FLASH Utilities
Real-Time OS
Simulated Features
NOTE
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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