Texas Instruments TMS470MF06607

The Texas Instruments TMS470MF06607 is an ARM Cortex-M3 32-Bit RISC CPU - Efficient 1.2 DMIPS/MHz - Optimized Thumb2 Instruction Set - Memory Protection Unit (MPU) - Open Architecture With Third-Party Support - Built-In Debug Module High-Performance Automotive Grade Microcontroller with Safety Features - Full Automotive Temperature Range - ECC on Flash and SRAM - CPU and Memory BIST (Built-In Self Test) Operating Features - Up to 80MHz System Clock - Single 3.3V Supply Voltage Integrated Memory - 640KB Total Program Flash with ECC - Support for Flash EEPROM Emulation - 64K-Byte Static RAM (SRAM) with ECC Key Peripherals - High-End Timer, MibADC, CAN, MibSPI Common TMS470M/570 Platform Architecture - Consistent Memory Map across the family - Real-Time Interrupt Timer (RTI) - Digital Watchdog - Vectored Interrupt Module (VIM) - Cyclic Redundancy Checker (CRC) Frequency-Modulated Zero-Pin Phase-Locked Loop (FMzPLL)-Based Clock Module - Oscillator and PLL clock monitor Up to 51 Peripheral IO pins - 4 Dedicated GIO - w/ External Interrupts - Programmable External Clock (ECLK) Communication Interfaces - Two CAN Controllers One with 32 mailboxes, one with 16 Parity on mailbox RAM - Two Multi-buffered Serial Peripheral Interface (MibSPI) 12 total chip selects 64 buffers with parity on each - Two UART (SCI) interfaces H/W Support for Local Interconnect Network (LIN 2.1 master mode) High-End Timer (HET) - Up to 18 Programmable I/O Channels - 64 Word Instruction RAM with parity 10-Bit Multi-Buffered ADCs (MibADC) - Up to 16 ADC Input channels - 64 Result FIFO Buffer with parity - 1.55uS total conversion time - Calibration and Self Test features On-Chip Scan-Base Emulation Logic - IEEE Standard 1149.1 (JTAG) Test-Access Port and Bound.