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Freescale Semiconductor MKL46Z128xxx4

The Freescale Semiconductor MKL46Z128xxx4 is a Core features - 32-bit ARM Cortex-M0+ core (up to 48MHz CPU Clock) - Nested vectored interrupt contr. (NVIC) - Async. wake-up interrupt contr. (AWIC) Debug & trace capability - 2-pin serial wire debug (SWD) - Micro trace buffer (MTB) - Data watchpoint and trace (DWT) - Single-cycle access to I/O System and power management - Software watchdog - Integrated bit manipulation engine (BME) - DMA controller - Low-leakage wake-up unit (LLWU) - Power management controller with 10 different power modes Clocks - External crystal oscillator or resonator - DC- 48 MHz external square wave input clock - Internal clock references - 31.25 to 39.063 kHz oscillator, 4 MHz oscillator, 1 kHz oscillator - Frequency-locked loop with the range of 20-25 MHz and 40-48 MHz - Phased-locked loop up to 100 VCO Memories and Memory Interfaces - Up to 128KB Flash - Up to 32KB SRAM Security and integrity - COP watchdog Analog - 16-bit analog-to-digital converters with DMA supported and four muxed differential pairs - 12-bit digital-to-analog converter (DAC) and two 16-bit data buffer Timers - Two 6-channel and one 2-channel 16-bit TMPs - 2-channel periodic interrupt timer - Real-time clock (SRTC) - Low-power timer (LPTMR) - System tick timer (SYSTIK) Communications - Two serial peripheral interface - USB OTG controller with built-in FS/LS transceiver - USB voltage regulator - Two inter-integrated circuit (I2C) modules - One low power UART module Human-machine interface - General purpose input/output controller - Capacitive touch sense input interface enabled in hardware.

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Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Data Sheet
246,599 bytes
Generic User Guide
957,968 bytes
Technical Reference Manual
426,589 bytes

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Header Files
FLASH Utilities
Real-Time OS
Simulated Features
NOTE
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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