Atmel SAM3N0B

The Atmel SAM3N0B is a Core - ARM Cortex-M3 revision 2.0 running at up to 48 MHz - Thumb-2 instruction - 24-bit SysTick Counter - Nested Vector Interrupt Controller Pin-to-pin compatible with SAM7S legacy products (48- and 64-pin versions) and SAM3S (48-, 64- and 100-pin versions) Memories - From 16 to 256 Kbytes embedded Flash, 128-bit wide access, memory accelerator, single plane - From 4 to 24 Kbytes embedded SRAM - 16 Kbytes ROM with embedded bootloader routines (UART) and IAP routines System - Embedded voltage regulator for single supply operation - Power-on-Reset (POR), Brown-out Detector (BOD) and Watchdog for safe operation - Quartz or ceramic resonator oscillators: 3 to 20 MHz main power with Failure Detection and optional low power 32.768 kHz for RTC or device clock - High precision 8/12 MHz factory trimmed internal RC oscillator with 4 MHz default frequency for device startup. In-application trimming access for frequency adjustment - Slow Clock Internal RC oscillator as permanent low-power mode device clock - One PLL up to 130 MHz for device clock - Up to 10 peripheral DMA (PDC) channels Low Power Modes - Sleep and Backup modes, down to 3 uA in Backup mode - Ultra low power RTC Peripherals - Up to 2 USARTs with ISO7816, IrDA, RS-485 and SPI mode - 2 Two wire UARTs - 2 Two Wire Interface (I2C compatible) - 1 SPI - Up to 6 Three-Channel 16-bit Timer/Counter with capture, waveform, compare and PWM mode. Quadrature Decoder Logic and 2-bit Gray Up/Down Counter for Stepper Motor - 4-channel 16-bit PWM - 32-bit Real-time Timer and RTC with calendar and alarm features - Up to 16 channels, 384 KSPS 10-bit ADC - One 500 KSPS 10-bit DAC I/O - Up to 79 I/O lines with external interrupt capability (edge or level sensitivity), debouncing, glitch filtering and on-die Series Resistor Termination - Three 32-bit Parallel Input/Output Controllers.