Peripheral Simulation

For Infineon C161JC — Port 5 (12-bit Input with Disable)

Simulation support for this peripheral or feature is comprised of:

• Dialog boxes which display and allow you to change peripheral configuration.
• VTREGs (Virtual Target Registers) which support I/O with the peripheral.

These simulation capabilities are described below.

Parallel Port 5 Dialog

This dialog displays the SFR and pins of Port 5. This port has alternate functions but it may be used as a 12-bit input-only port. Data written to this port is not output on the device pins.

• P5 represents the P5 SFR. The HEX value and value of each bit is displayed and may be changed from this dialog.
• P5DIDIS represents the P5DIDIS SFR which is used to disconnect the P5 SFR bits from the respective Port 5 pin. When P5DIDIS.x=0, P5.x is connected to the Port 5.x pin. When P5DIDIS.x=1, P5.x is disconnected from the Port 5.x pin.
• Pins represents the states of the pins on the simulated MCU. You may set the level of the input pin to high (1) or low (0). The corresponding value will be set in the respective P5 bit.

PORTx VTREG
Data Type: unsigned int

The PORTx VTREGs represent the I/O pins of the simulated MCU for Port 0, Port 1, and so on. You may read PORTx to determine the state of the output pins of that port. For example, in the command window, you may type,

PORT8

to obtain the value corresponding to the set pins of Port 8. You may also change the input values of port pins by changing the value of the VTREG. For example,

PORT7=0x00F0

sets bits 4-7 and clears bits 0-3 and 8-15. You may use the bitwise operators AND(&), OR(|) and XOR(^) to change individual bits of the PORTx VTREGs. For example:

PORT2 |=  0x0001;  /* Set P2.0 Pin */
PORT8 &= ~0x0002;  /* Clr P8.1 Pin */
PORT7 ^=  0x0080;  /* Toggle P7.7 Pin */