Peripheral Simulation
For Atmel AT91M55800A — Analog/Digital Converter 1 (4 Channels)
Simulation support for this peripheral or feature is comprised of:
- Dialog boxes which display and allow you to change peripheral configuration.
- VTREGs (Virtual Target Registers) which support I/O with the peripheral.
These simulation capabilities are described below.
Analog/Digital Converter 1 Dialog
The Analog/Digital Converter 1 dialog displays and configures the
A/D converter. The controls in this dialog are separated into several
logical groups.
Control Group
-
ADC1_CR (ADC Control Register) displays and configures
the A/D Converter control register.
-
SWRST (Software Reset) button resets the ADC simulating
a hardware reset.
-
START (Start Conversion) button begins analog-to-digital
conversion.
Mode Group
-
ADC1_MR (ADC Mode Register) displays and configures the
A/D Converter mode of operation.
-
TRGSEL (Trigger Selection) selects the hardware trigger
source.
-
SLEEP (Sleep Mode) deactivates the ADC to save power
when it is not being used.
-
RES (Resolution) produces 8-bit digital output in the
convert registers, if set. The convert registers produce 10-bit
output, if reset.
-
TRGEN (Trigger Enable) enables the hardware trigger
defined by the trigger selection (TRGSEL), if set. If reset, ADC
conversions can only be triggered by software.
-
PRESCAL (Prescaler Rate Selection) defines how the
master clock is converted into the ADC clock.
- Conv.Time is the converted ADC clock value.
Channel Status Group
-
ADC1_CHSR (Channel Status Register) enables or disables
conversion channels 0-3.
-
CH3-CH0 (Channel Status) is set to enable a Channel, or
reset to disable a Channel.
Interrupt Mask & Status Group
-
ADC1_IMR (Interrupt Mask Register) controls the End of
Conversion (EOCx) and overrun (OVREx) interrupts.
-
ADC1_SR (Status Register) displays the End of Conversion
(EOCx) and Overrun (OVREx)
-
OVRE3-OVRE0 (Overrun Error Interrupt Mask) enables the
Overrun Error interrupt for Channels 0-3, if set.
-
EOC3-EOC0 (End of Conversion Interrupt Mask) enables the
End of Conversion interrupt for Channels 0-3, if set.
Analog Inputs Group
-
AD4-AD7 (Analog input channels 4-7) displays the analog
voltage value for each input channel.
Reference Voltage
-
ADVREF (Analog reference) configures the input voltage
limit for AD4-AD7.
Converted Data Group
-
ADC1_CDR0-ADC1_CDR3 (Convert Data) contains the 8 or
10-bit digital output value based on the resolution setting
(RES).
ADVREF VTREG
Data Type: float
The ADVREF VTREG sets the analog reference voltage for simulated
A/D converters.
ADx VTREG
Data Type: float
The ADx VTREGs set the analog input voltages for simulated A/D
converters. The ADx VTREGs represent the inputs to the analog input
pins of the MCU for analog input 0, 1, 2, and so on. AD0 sets the
input voltage for analog input #0, AD1 sets the input voltage for
analog input #1, etc. If you have properly configured the analog
inputs, the following commands (typed in the debugger's Command
Window) input the voltages specified.
AD0 = 0.000 /* Analog Input 0 = 0.000 volts */
AD1 = 2.500 /* Analog Input 1 = 2.500 volts */
AD2 = 4.999 /* Analog Input 2 = 4.999 volts */
You may create a debugger signal function to periodically change
the value of the A/D input. The following signal function increases
the A/D Channel 1 input voltage by 0.1 volts each second.
signal void AD1_sig (void) {
float f;
for (f = 0.0; f < 5.0; f += 0.1)
{
swatch (1.0); // Delay 1 second
AD1 = f; // Set AD1 Voltage
}
}