|
|||||||||||
Product Information Device Database® Downloads Compliance Testing Distributors |
Peripheral SimulationFor Dallas Semiconductor DS80C410 — One's Complement Adder Simulation support for this peripheral or feature is comprised of:
These simulation capabilities are described below. One's Complement Adder
The One's Complement Adder provides an efficient way to calculate a 16-bit checksum. Writing 2 bytes successively to a special SFR (OCAD) triggers a 16-bit one's complement add to an internal accumulator. Writing to this register is repeated, 2 bytes at a time, until the entire data block is checksummed. When the OCAD SFR is read twice, the MSB and LSB, respectively, of the calculated 16-bit checksum is returned. | ||||||||||
|
Arm’s Privacy Policy has been updated. By continuing to use our site, you consent to Arm’s Privacy Policy. Please review our Privacy Policy to learn more about our collection, use and transfers
of your data.