Peripheral Simulation

For NXP (founded by Philips) P89LPC952 — Port 0 (Quasi-bidirectional, Push-Pull, Input Only, Open Drain)

Simulation support for this peripheral or feature is comprised of:

• Dialog boxes which display and allow you to change peripheral configuration.
• VTREGs (Virtual Target Registers) which support I/O with the peripheral.

These simulation capabilities are described below.

Parallel Port 0 Dialog

This dialog displays the SFR and pins of Port 0. This port may be used as a 8-bit general purpose I/O port.

• P0 represents the P0 SFR. The HEX value and value of each bit is displayed and may be changed from this dialog.
• P0M1 and P0M2 configure the output mode of each pin for this port.

• Set P0M1.x:P0M2.x as follows: 0:0 for Quasi-Bidirectional, 0:1 for Push-Pull, 1:0 for Input Only (Hi-Z), or 1:1 for Open Drain.

• PT0AD (Port 0 Digital Input Disable) is set to disable digital signals for this bit. You may not disable shaded bits.
• Pins represents the states of the pins on the simulated MCU. You may set the level of the input pin to high (1) or low (0).
• ENT1 (Enable T1) is set to toggle P0.7 (T1) whenever Timer 1 overflows. This produces an output on T1 that is one-half the Timer 1 overflow rate.

PORTx VTREG
Data Type: unsigned char

The PORTx VTREGs represent the I/O pins of the simulated MCU for Port 0, Port 1, and so on. PORT0 represents Port 0, PORT1 represents Port 1, etc. You may read PORTx to determine the state of the output pins of that port. For example, in the command window, you may type,

PORT0

to obtain value corresponding to the set pins of Port 0. You may also change the input values of port pins by changing the value of the VTREG. For example,

PORT1=0xF0

sets the upper four port pins of Port 1 to a value of 1 and the lower 4 port pins to a value of 0. You may use the bitwise operators AND(&), OR(|) and XOR(^) to change individual bits of the PORTx VTREGs. For example:

PORT1 |=  0x01;  /* Set P1.0 Pin */
PORT3 &= ~0x02;  /* Clr P3.1 Pin */
PORT1 ^=  0x80;  /* Toggle P1.7 Pin */