Peripheral Simulation

For Atmel AT91SAM9263 — USARTs 0-2

Simulation support for this peripheral or feature is comprised of:

• Dialog boxes which display and allow you to change peripheral configuration.

These simulation capabilities are described below.

USART 0 Dialog

The USART 0 Dialog configures USART 0. A USART transfers serial data to and from external devices and the ARM controller. The USART can be configured in a variety of ways to suit the external serial device.

Control

• US0_CR (USART 0 Control Register) displays the combined control information for the following:
• RXEN (Receiver Enable) enables the receiver.
• TXEN (Transmitter Enable) enables the transmitter.
• RXDIS (Receiver Disable) disables the receiver.
• TXDIS (Transmitter Disable) disables the transmitter.
• RSTRX (Reset Receiver) resets the receiver.
• RSTTX (Reset Transmitter) resets the transmitter.
• RSTSTA (Reset Status Bits) resets the Parity Error (PARE), Framing Error (FRAME), Overrun Error (OVRE) and Break Received (RXBRK) status bits.
• SENDA (Send Address) sets the address bit with the next character written (multi-drop mode only).
• RSTIT (Reset Iterations) resets the Iteration status.
• STTTO (Start Time-out) restarts the wait time-out for a new character.
• RSTNACK (Reset Non Acknowledge) resets the Non Acknowledge status.
• RETTO (Reload and Start Time-out) restarts the receiver time-out counter.
• STTBRK (Start Break) generates a break condition after the next character is sent.
• STPBRK (Stop Break) cancels a break condition.
• DTREN (Data Terminal Ready Enable) drives the DTR pin to 0.
• DTRDIS (Data Terminal Ready Disable) drives the DTR pin to 1.
• RTSEN (Request to Send Enable) drives the RTS pin to 0.
• RTSDIS (Request to Send Disable) drives the RTS pin to 1.

Mode

• US0_MR (Mode Register) contains the USART Mode settings which is determined by settings of other controls in this group.
• MODE (USART Mode) configures the USART for normal, RS485, hardware handshake, modem, ISO7816 Protocol: T=0, ISO7816 Protocol: T=1 or IrDA mode.
• CHMODE (Channel Mode) selects normal, loopback, echo or remote loopback pin configurations.
• SYNC (Synchronous Mode Select) enables Synchronous mode.
• CHRL (Character Length) selects the number of bits per character.
• NBSTOP (Number of Stop Bits) selects the number of stop bits to be sent with each character.
• PAR (Parity Type) selects the generation of even, odd or no parity bits, mark or space, or multi-drop mode.
• Mode 9 (9-bit Mode) is set to use 9 data bits for character length. If reset, CHRL determines character length.
• MBSF (Most Significant Bit First) is set to send or receive the most significant bit first. If reset, the least significant bit first is sent or expected.
• CLKO (Clock Output Select) when set, drives the SCK pin if the external clock is not selected.
• USCLKS (Clock Selection) selects clock source and type.
• MAX_ITERATION (Maximum Number of Iterations) configures the maximum number of iterations when using mode ISO7816, protocol T=0.
• OVER (Oversampling Mode) is set to use 8x oversampling. If reset, the USART uses 16x oversampling.
• FILTER (Infrared Line Receive Filter) is set to enable the USART's three-sample filter.
• INACK (Inhibit Non Acknowledge) is set to suppress NACK generation.
• DSNACK (Disable Successive NACK) is set to count successive parity errors up to the MAX_ITERATION value. If that value is reached, the ITERATION bit is set.

Baudrate Generator & FI DI Ratio

• US0_BRGR (Baud Rate Generator Register) holds the Clock Divisor (CD) value.
• CD (Clock Divisor) contains the value divided into the clock that determines the baud rate.
• Baudrate displays the baud rate calculated by the USART.
• US0_FIDI (FI DI Register) contains the clock frequency division factor (FI) over the bit-rate adjustment factor (DI) for ISO7816 mode.
• US0_FIDI_RATIO (FI Over DI Ratio) contains the value divided into the SCK to determine the IOS7816 baudrate.

Receiver Time-out & Transmitter Time-guard

• US0_RTOR (Receiver Time-out Register) holds the receiver time-out value.
• TO (Time Out) sets the time-out counter value used with the Start Time-out command.
• US0_TTGR (Transmitter Time-guard Register) holds the transmitter time guard value.
• TG (Time-guard) sets the length of time TXD is inactive after each character.

Receiver & Transmitter

• US0_RHR (Receiver Holding Register) contains the RXCHR character.
• RXCHR (Received Character) holds the last character received.
• US0_THR (Transmitter Holding Register) contains the TXCHR character.
• TXCHR (Character to be Transmitted) holds the next character to be transmitted.

Number of Errors and IrDA Filter

• US0_NER (Number of Errors Register) contains the NB_ERRORS value.
• NB_ERRORS (Number of Errors) contains the total number of errors that occurred during an ISO7816 data transfer. This register is cleared when read.
• US0_IF (IrDA Filter) contains the IRDA_FILTER value.
• IRDA_FILTER (IrDA Filter) contains the 8-bit down counter value used for demodulation of the received signal.

Interrupt Mask & Channel Status

• US0_IMR (Interrupt Mask Register) holds the masking bits for all of the internal peripheral interrupts.
• US0_CSR (Channel Status Register) holds the composite status for the USART channel.
• CTS (Clear to Send pin) displays the CTS pin status.
• DCD (Data Carrier Detect pin) displays the DCD pin status.
• DSR (Data Set Ready pin) displays the DSR pin status.
• RI (Ring Indicator pin) displays the RI pin status.
• CTSIC (Clear to Send Input Change Flag) is set if at least 1 input change on CTS is detected.
• DCDIC (Data Carrier Detect Input Change Flag) is set if at least 1 input change on DCD is detected.
• DSRIC (Data Set Ready Input Change Flag) is set if at least 1 input change on DSR is detected.
• RIIC (Ring Indicator Input Change Flag) is set if at least 1 input change on RI is detected.
• NACK (Non Acknowledge Flag) is set if at least one NACK is detected.
• RXBUFF (Receive Buffer Full) is set if the Buffer Full signal from the PDC is active.
• TXBUFF (Transmit Buffer Full) is set if the Buffer Empty signal from the PDC is active.
• ITERATION (Iteration Flag) set if more than the maximum number of parity errors has occurred.
• TXEMPTY (Transmitter Empty) set if there are no characters in the transmitter hold register(US0_THR).
• TIMEOUT (Receiver Time-out) set if a Start Time-out counter has elapsed.
• PARE (Parity Error) set if the controller detects at least 1 false parity bit since the last Reset Status Bits command (RSTSTA).
• FRAME (Framing Error) set if the controller detects a framing error since the last Reset Status Bits command (RSTSTA).
• OVRE (Overrun Error) set if the controller detects an overrun condition since the last Reset Status Bits command (RSTSTA).
• ENDTX (End of Transmitter Transfer) is set if the End of Transmitter signal is active.
• ENDRX (End of Receiver Transfer) is set if the End of Receiver signal is active.
• RXBRK (Break Received/End of Break) is set if the USART receives a break since the last Reset Status Bits command (RSTSTA).
• TXRDY (Transmitter Ready) set if the transmit hold register (US0_THR) is empty and there is no break request pending.
• RXRDY (Receiver Ready) set when the USART receives at least 1 character and the receiver hold register (US0_RHR) is not empty.

Modem Lines

• RTS0 (Request to Send) displays the RTS pin status.
• CTS0 (Clear to Send) displays the CTS pin status.

USART 1 Dialog

The USART 1 Dialog configures USART 1. A USART transfers serial data to and from external devices and the ARM controller. The USART can be configured in a variety of ways to suit the external serial device.

Control

• US1_CR (USART 1 Control Register) displays the combined control information for the following:
• RXEN (Receiver Enable) enables the receiver.
• TXEN (Transmitter Enable) enables the transmitter.
• RXDIS (Receiver Disable) disables the receiver.
• TXDIS (Transmitter Disable) disables the transmitter.
• RSTRX (Reset Receiver) resets the receiver.
• RSTTX (Reset Transmitter) resets the transmitter.
• RSTSTA (Reset Status Bits) resets the Parity Error (PARE), Framing Error (FRAME), Overrun Error (OVRE) and Break Received (RXBRK) status bits.
• SENDA (Send Address) sets the address bit with the next character written (multi-drop mode only).
• RSTIT (Reset Iterations) resets the Iteration status.
• STTTO (Start Time-out) restarts the wait time-out for a new character.
• RSTNACK (Reset Non Acknowledge) resets the Non Acknowledge status.
• RETTO (Reload and Start Time-out) restarts the receiver time-out counter.
• STTBRK (Start Break) generates a break condition after the next character is sent.
• STPBRK (Stop Break) cancels a break condition.
• DTREN (Data Terminal Ready Enable) drives the DTR pin to 0.
• DTRDIS (Data Terminal Ready Disable) drives the DTR pin to 1.
• RTSEN (Request to Send Enable) drives the RTS pin to 0.
• RTSDIS (Request to Send Disable) drives the RTS pin to 1.

Mode

• US1_MR (Mode Register) contains the USART Mode settings which is determined by settings of other controls in this group.
• MODE (USART Mode) configures the USART for normal, RS485, hardware handshake, modem, ISO7816 Protocol: T=0, ISO7816 Protocol: T=1 or IrDA mode.
• CHMODE (Channel Mode) selects normal, loopback, echo or remote loopback pin configurations.
• SYNC (Synchronous Mode Select) enables Synchronous mode.
• CHRL (Character Length) selects the number of bits per character.
• NBSTOP (Number of Stop Bits) selects the number of stop bits to be sent with each character.
• PAR (Parity Type) selects the generation of even, odd or no parity bits, mark or space, or multi-drop mode.
• Mode 9 (9-bit Mode) is set to use 9 data bits for character length. If reset, CHRL determines character length.
• MBSF (Most Significant Bit First) is set to send or receive the most significant bit first. If reset, the least significant bit first is sent or expected.
• CLKO (Clock Output Select) when set, drives the SCK pin if the external clock is not selected.
• USCLKS (Clock Selection) selects clock source and type.
• MAX_ITERATION (Maximum Number of Iterations) configures the maximum number of iterations when using mode ISO7816, protocol T=0.
• OVER (Oversampling Mode) is set to use 8x oversampling. If reset, the USART uses 16x oversampling.
• FILTER (Infrared Line Receive Filter) is set to enable the USART's three-sample filter.
• INACK (Inhibit Non Acknowledge) is set to suppress NACK generation.
• DSNACK (Disable Successive NACK) is set to count successive parity errors up to the MAX_ITERATION value. If that value is reached, the ITERATION bit is set.

Baudrate Generator & FI DI Ratio

• US1_BRGR (Baud Rate Generator Register) holds the Clock Divisor (CD) value.
• CD (Clock Divisor) contains the value divided into the clock that determines the baud rate.
• Baudrate displays the baud rate calculated by the USART.
• US1_FIDI (FI DI Register) contains the clock frequency division factor (FI) over the bit-rate adjustment factor (DI) for ISO7816 mode.
• US1_FIDI_RATIO (FI Over DI Ratio) contains the value divided into the SCK to determine the IOS7816 baudrate.

Receiver Time-out & Transmitter Time-guard

• US1_RTOR (Receiver Time-out Register) holds the receiver time-out value.
• TO (Time Out) sets the time-out counter value used with the Start Time-out command.
• US1_TTGR (Transmitter Time-guard Register) holds the transmitter time guard value.
• TG (Time-guard) sets the length of time TXD is inactive after each character.

Receiver & Transmitter

• US1_RHR (Receiver Holding Register) contains the RXCHR character.
• RXCHR (Received Character) holds the last character received.
• US1_THR (Transmitter Holding Register) contains the TXCHR character.
• TXCHR (Character to be Transmitted) holds the next character to be transmitted.

Number of Errors and IrDA Filter

• US1_NER (Number of Errors Register) contains the NB_ERRORS value.
• NB_ERRORS (Number of Errors) contains the total number of errors that occurred during an ISO7816 data transfer. This register is cleared when read.
• US1_IF (IrDA Filter) contains the IRDA_FILTER value.
• IRDA_FILTER (IrDA Filter) contains the 8-bit down counter value used for demodulation of the received signal.

Interrupt Mask & Channel Status

• US1_IMR (Interrupt Mask Register) holds the masking bits for all of the internal peripheral interrupts.
• US1_CSR (Channel Status Register) holds the composite status for the USART channel.
• CTS (Clear to Send pin) displays the CTS pin status.
• DCD (Data Carrier Detect pin) displays the DCD pin status.
• DSR (Data Set Ready pin) displays the DSR pin status.
• RI (Ring Indicator pin) displays the RI pin status.
• CTSIC (Clear to Send Input Change Flag) is set if at least 1 input change on CTS is detected.
• DCDIC (Data Carrier Detect Input Change Flag) is set if at least 1 input change on DCD is detected.
• DSRIC (Data Set Ready Input Change Flag) is set if at least 1 input change on DSR is detected.
• RIIC (Ring Indicator Input Change Flag) is set if at least 1 input change on RI is detected.
• NACK (Non Acknowledge Flag) is set if at least one NACK is detected.
• RXBUFF (Receive Buffer Full) is set if the Buffer Full signal from the PDC is active.
• TXBUFF (Transmit Buffer Full) is set if the Buffer Empty signal from the PDC is active.
• ITERATION (Iteration Flag) set if more than the maximum number of parity errors has occurred.
• TXEMPTY (Transmitter Empty) set if there are no characters in the transmitter hold register(US1_THR).
• TIMEOUT (Receiver Time-out) set if a Start Time-out counter has elapsed.
• PARE (Parity Error) set if the controller detects at least 1 false parity bit since the last Reset Status Bits command (RSTSTA).
• FRAME (Framing Error) set if the controller detects a framing error since the last Reset Status Bits command (RSTSTA).
• OVRE (Overrun Error) set if the controller detects an overrun condition since the last Reset Status Bits command (RSTSTA).
• ENDTX (End of Transmitter Transfer) is set if the End of Transmitter signal is active.
• ENDRX (End of Receiver Transfer) is set if the End of Receiver signal is active.
• RXBRK (Break Received/End of Break) is set if the USART receives a break since the last Reset Status Bits command (RSTSTA).
• TXRDY (Transmitter Ready) set if the transmit hold register (US1_THR) is empty and there is no break request pending.
• RXRDY (Receiver Ready) set when the USART receives at least 1 character and the receiver hold register (US1_RHR) is not empty.

Modem Lines

• RTS1 (Request to Send) displays the RTS pin status.
• CTS1 (Clear to Send) displays the CTS pin status.
• DTR1 (Data Terminal Ready) displays the DTR pin status.
• DSR1 (Data Set Ready) displays the DSR pin status.
• DCD1 (Data Carrier Detect) displays the DCD pin status.
• RI1 (Ring Indicator) displays the RI pin status.

USART 2 Dialog

The USART 2 Dialog configures USART 2. A USART transfers serial data to and from external devices and the ARM controller. The USART can be configured in a variety of ways to suit the external serial device.

Control

• US2_CR (USART 2 Control Register) displays the combined control information for the following:
• RXEN (Receiver Enable) enables the receiver.
• TXEN (Transmitter Enable) enables the transmitter.
• RXDIS (Receiver Disable) disables the receiver.
• TXDIS (Transmitter Disable) disables the transmitter.
• RSTRX (Reset Receiver) resets the receiver.
• RSTTX (Reset Transmitter) resets the transmitter.
• RSTSTA (Reset Status Bits) resets the Parity Error (PARE), Framing Error (FRAME), Overrun Error (OVRE) and Break Received (RXBRK) status bits.
• SENDA (Send Address) sets the address bit with the next character written (multi-drop mode only).
• RSTIT (Reset Iterations) resets the Iteration status.
• STTTO (Start Time-out) restarts the wait time-out for a new character.
• RSTNACK (Reset Non Acknowledge) resets the Non Acknowledge status.
• RETTO (Reload and Start Time-out) restarts the receiver time-out counter.
• STTBRK (Start Break) generates a break condition after the next character is sent.
• STPBRK (Stop Break) cancels a break condition.
• DTREN (Data Terminal Ready Enable) drives the DTR pin to 0.
• DTRDIS (Data Terminal Ready Disable) drives the DTR pin to 1.
• RTSEN (Request to Send Enable) drives the RTS pin to 0.
• RTSDIS (Request to Send Disable) drives the RTS pin to 1.

Mode

• US2_MR (Mode Register) contains the USART Mode settings which is determined by settings of other controls in this group.
• MODE (USART Mode) configures the USART for normal, RS485, hardware handshake, modem, ISO7816 Protocol: T=0, ISO7816 Protocol: T=1 or IrDA mode.
• CHMODE (Channel Mode) selects normal, loopback, echo or remote loopback pin configurations.
• SYNC (Synchronous Mode Select) enables Synchronous mode.
• CHRL (Character Length) selects the number of bits per character.
• NBSTOP (Number of Stop Bits) selects the number of stop bits to be sent with each character.
• PAR (Parity Type) selects the generation of even, odd or no parity bits, mark or space, or multi-drop mode.
• Mode 9 (9-bit Mode) is set to use 9 data bits for character length. If reset, CHRL determines character length.
• MBSF (Most Significant Bit First) is set to send or receive the most significant bit first. If reset, the least significant bit first is sent or expected.
• CLKO (Clock Output Select) when set, drives the SCK pin if the external clock is not selected.
• USCLKS (Clock Selection) selects clock source and type.
• MAX_ITERATION (Maximum Number of Iterations) configures the maximum number of iterations when using mode ISO7816, protocol T=0.
• OVER (Oversampling Mode) is set to use 8x oversampling. If reset, the USART uses 16x oversampling.
• FILTER (Infrared Line Receive Filter) is set to enable the USART's three-sample filter.
• INACK (Inhibit Non Acknowledge) is set to suppress NACK generation.
• DSNACK (Disable Successive NACK) is set to count successive parity errors up to the MAX_ITERATION value. If that value is reached, the ITERATION bit is set.

Baudrate Generator & FI DI Ratio

• US2_BRGR (Baud Rate Generator Register) holds the Clock Divisor (CD) value.
• CD (Clock Divisor) contains the value divided into the clock that determines the baud rate.
• Baudrate displays the baud rate calculated by the USART.
• US2_FIDI (FI DI Register) contains the clock frequency division factor (FI) over the bit-rate adjustment factor (DI) for ISO7816 mode.
• US2_FIDI_RATIO (FI Over DI Ratio) contains the value divided into the SCK to determine the IOS7816 baudrate.

Receiver Time-out & Transmitter Time-guard

• US2_RTOR (Receiver Time-out Register) holds the receiver time-out value.
• TO (Time Out) sets the time-out counter value used with the Start Time-out command.
• US2_TTGR (Transmitter Time-guard Register) holds the transmitter time guard value.
• TG (Time-guard) sets the length of time TXD is inactive after each character.

Receiver & Transmitter

• US2_RHR (Receiver Holding Register) contains the RXCHR character.
• RXCHR (Received Character) holds the last character received.
• US2_THR (Transmitter Holding Register) contains the TXCHR character.
• TXCHR (Character to be Transmitted) holds the next character to be transmitted.

Number of Errors and IrDA Filter

• US2_NER (Number of Errors Register) contains the NB_ERRORS value.
• NB_ERRORS (Number of Errors) contains the total number of errors that occurred during an ISO7816 data transfer. This register is cleared when read.
• US2_IF (IrDA Filter) contains the IRDA_FILTER value.
• IRDA_FILTER (IrDA Filter) contains the 8-bit down counter value used for demodulation of the received signal.

Interrupt Mask & Channel Status

• US2_IMR (Interrupt Mask Register) holds the masking bits for all of the internal peripheral interrupts.
• US2_CSR (Channel Status Register) holds the composite status for the USART channel.
• CTS (Clear to Send pin) displays the CTS pin status.
• DCD (Data Carrier Detect pin) displays the DCD pin status.
• DSR (Data Set Ready pin) displays the DSR pin status.
• RI (Ring Indicator pin) displays the RI pin status.
• CTSIC (Clear to Send Input Change Flag) is set if at least 1 input change on CTS is detected.
• DCDIC (Data Carrier Detect Input Change Flag) is set if at least 1 input change on DCD is detected.
• DSRIC (Data Set Ready Input Change Flag) is set if at least 1 input change on DSR is detected.
• RIIC (Ring Indicator Input Change Flag) is set if at least 1 input change on RI is detected.
• NACK (Non Acknowledge Flag) is set if at least one NACK is detected.
• RXBUFF (Receive Buffer Full) is set if the Buffer Full signal from the PDC is active.
• TXBUFF (Transmit Buffer Full) is set if the Buffer Empty signal from the PDC is active.
• ITERATION (Iteration Flag) set if more than the maximum number of parity errors has occurred.
• TXEMPTY (Transmitter Empty) set if there are no characters in the transmitter hold register(US2_THR).
• TIMEOUT (Receiver Time-out) set if a Start Time-out counter has elapsed.
• PARE (Parity Error) set if the controller detects at least 1 false parity bit since the last Reset Status Bits command (RSTSTA).
• FRAME (Framing Error) set if the controller detects a framing error since the last Reset Status Bits command (RSTSTA).
• OVRE (Overrun Error) set if the controller detects an overrun condition since the last Reset Status Bits command (RSTSTA).
• ENDTX (End of Transmitter Transfer) is set if the End of Transmitter signal is active.
• ENDRX (End of Receiver Transfer) is set if the End of Receiver signal is active.
• RXBRK (Break Received/End of Break) is set if the USART receives a break since the last Reset Status Bits command (RSTSTA).
• TXRDY (Transmitter Ready) set if the transmit hold register (US2_THR) is empty and there is no break request pending.
• RXRDY (Receiver Ready) set when the USART receives at least 1 character and the receiver hold register (US2_RHR) is not empty.

Modem Lines

• RTS2 (Request to Send) displays the RTS pin status.
• CTS2 (Clear to Send) displays the CTS pin status.