Peripheral Simulation

For Texas Instruments LM3S1751 — Fault Reports

Simulation support for this peripheral or feature is comprised of:

• Dialog boxes which display and allow you to change peripheral configuration.

These simulation capabilities are described below.

Fault Reports Dialog

The Fault Reports Dialog displays the types of fault, the handler used for the fault, the corresponding fault status register, and the register bit that indicates that the fault has occurred.

Memory Manage Faults

• MM_FAULT_ADDR contains the address that caused the memory fault.
• MM_FAULT_STAT contains the following Memory Manage Fault Status Register settings:
• IACCVIOL is set when the processor attempted an instruction fetch from a location that does not permit execution.
• DACCVIOL is set when the processor attempted a load or store at a location that does not permit the operation.
• MMARVALID is set when MM_FAULT_ADDR holds a valid fault address.
• MUNSTKERR is set when unstack for an exception return has caused one or more access violations.
• MSTKERR is set when stacking for an exception entry has caused one or more access violations.

Bus Faults

• BUS_FAULT_ADDR contains the bus address that caused the bus fault.
• BUS_FAULT_STAT contains the following Bus Fault Status Register settings:
• IBUSERR is set when the processor detects an instruction bus error on prefetching an instruction and attempts to issue the faulting instruction.
• PRECISERR is set when a data bus error has occurred, and the PC value stacked for the exception return points to the instruction that caused the fault.
• IMPRECISERR is set when a data bus error has occurred, but the return address in the stack frame is not related to the instruction that caused the error.
• UNSTKERR is set when unstack for an exception return has caused one or more BusFaults.
• STKERR is set when stacking for an exception entry has caused one or more BusFaults.
• BFARVALID is set when BUS_FAULT_ADDR holds a valid fault address.

Usage Faults

• USAGE_FAULT_STAT contains the following Usage Fault Status Register settings:
• UNDEFINSTR is set when the processor has attempted to execute an undefined instruction.
• INVSTATE is set when the processor has attempted to execute an instruction that makes illegal use of the EPSR.
• INVPC is set when the processor has attempted an illegal load of EXC_RETURN to the PC, as a result of an invalid context, or an invalid EXC_RETURN value.
• NOCP is set when the processor has attempted to access a coprocessor. Coprocessors are not supported..
• UNALIGNED is set when the processor has made an unaligned memory access.
• DIVBYZERO is set when the processor has executed an SDIV or UDIV instruction with a divisor of 0.

Hard Faults

• HARD_FAULT_STAT contains the following Hard Fault Status Register settings:
• VECTBL is set to indicate a BusFault on a vector table read during exception processing
• FORCED is set to indicate a forced HardFault, generated by escalation of a fault with configurable priority that cannot be handled, either because of priority or because it is disabled
• DEBUGVT is reserved for Debug use.

Debug Faults

• DBG_FAULT_STAT contains the following Debug Fault Status Register settings:
• HALTED is set when the processor is halted.
• BKPT is set when a software breakpoint is encountered.
• DWTTRAP is set when a watchpoint match occurs.
• VCATCH is set when a vector catch is triggered.
• EXTERNAL is set when the EDBGRQ line is asserted.