Peripheral Simulation

For Infineon XE161FL-20F — Reset Configuration

Simulation support for this peripheral or feature is comprised of:

• VTREGs (Virtual Target Registers) which support I/O with the peripheral.

These simulation capabilities are described below.

CLKCFG VTREG
Data Type: unsigned char

The CLKCFG VTREG contains the clock generation mode at reset. This VTREG allows you to specify the relationship between the oscillator frequency and the instruction clock. This is required to calculate the execution time of the MCU instructions. The values for CLKCFG vary depending on the selected device. The following values are valid for the C167:

• 0: CLOCK = XTAL * 2.5
• 1: CLOCK = XTAL / 2
• 2: CLOCK = XTAL * 1.5
• 3: CLOCK = XTAL * 1
• 4: CLOCK = XTAL * 5
• 5: CLOCK = XTAL * 2
• 6: CLOCK = XTAL * 3
• 7: CLOCK = XTAL * 4

To change the clock configuration, you must set CLKCFG and reset the simulated MCU (using the RESET command). For example:

CLKCFG=2   /* XTAL * 1.5 */
RESET

EA VTREG
Data Type: bit

The EA VTREG contains the status of the EA pin at reset. It is required to calculate the execution time of the MCU instructions. To set the value of the EA pin, you must set EA to the desired value (0 or 1) and RESET the simulated MCU (you may use a RESET command) to load the value into the simulated MCU. For example:

EA=1
RESET

EBC VTREG
Data Type: unsigned char

The EBC VTREG contains the External Bus Configuration value at reset. This VTREG allows you to configure the bus configuration used by the simulated MCU. This is required to calculate the execution time of the MCU instructions. The following values for EBD are valid:

• 0: 8-bit data bus, non-multiplexed
• 1: 8-bit data bus, multiplexed
• 2: 16-bit data bus, non-multiplexed
• 3: 16-bit data bus, multiplexed

To change the bus configuration, you must set the EBC and reset the simulated MCU (using the RESET command). For example:

EBC=2   /* 8-bit multiplexed */
RESET