Peripheral Simulation

For Cypress CY8C3665AXI-198 — Serial UART (Enhanced Interface)

Simulation support for this peripheral or feature is comprised of:

• Dialog boxes which display and allow you to change peripheral configuration.
• VTREGs (Virtual Target Registers) which support I/O with the peripheral.

These simulation capabilities are described below.

Serial Channel Dialog

The Serial Channel dialog displays and allows you to edit the configuration of the Serial Interface.

• Mode displays and allows you to change the serial interface mode of operation (data bit length and baud rate).
• SCON (Serial Control Register) holds the control and setup information for programming the serial port.
• SBUF (Serial Interface Buffer Register) contains the transmit data to be sent or received data.
• SADDR (Slave Address) when the MCU is a master, this selects a slave device for communication with another serial device.
• SADEN (Slave Address Mask) determines which bits of the slave address are used for communication with another serial device.
• SM2 (Enable Serial Port Multiprocessor Communication In Modes 2 and 3) is set to suppress a receiver interrupt (RI) if the received 9th data bit is 0.
• TB8 (Serial Port Transmitter Bit 9) is the 9th data bit to be transmitted for serial modes 2 and 3.
• RB8 (Serial Port Receiver Bit 9) is set for serial modes 2 and 3 when a 9th bit is received. In serial mode 1, this is the stop bit.
• SMOD0 (Framing Error Mode) is set to enable framing error detection.
• FE (Framing Error Detected) is set when an invalid stop bit (framing error) is detected. This bit must be reset by software.
• REN (Receiver Enable) is set to enable serial data input.

BaudRate

• SMOD1 (Double Baudrate) is set to double the baudrate in mode 2.
• RCLK (Receive Clock Enable) is set to use Timer 2 overflows for the receive clock. If reset, Timer 1 overflows are used.
• TCLK (Transmit Clock Enable) is set to use Timer 2 overflows for the transmit clock. If reset, Timer 1 overflows are used.
• Transmit & Receive Baudrate is the actual baudrate for the serial channel. It can be derived from the oscillator frequency, or generated by Timer 1.

IRQ

• TI (Transmitter Interrupt Flag) is set by hardware for each character frame transmitted. TI is cleared by software.
• RI (Receiver Interrupt Flag) is set by hardware for each character frame received. RI is cleared by software.

SIN VTREG
Data Type: unsigned int

The SIN VTREG represents the serial input of the simulated microcontroller. Values you assign to SIN are input to the serial channel. You may assign input using the command window. For example,

SIN='A'

causes the simulated microcontroller serial input to receive the ASCII character A. If you want to use the SIN VRTEG to simulate reception of multiple characters, you must be sure to delay for atleast one character time between successive assignments to SIN. This may be done using a signal function. For example:

signal void send_cat (void) {
swatch(0.01);  /* Wait 1/100 seconds */
SIN='C';       /* Send a C */
swatch(0.01);
SIN='A';
swatch(0.01);
SIN='T';
}

You may use the SIN VTREG to input more than 8 bits of data. For example,

SIN=0x0123

inputs a 9-bit value. This is useful if you use 9-bit serial I/O. In addition to the SIN VRTEG, the serial window allows you to input serial characters by simply typing. Serial characters that are transmitted byt the simulated microcontroller appear in the serial window.

SOUT VTREG
Data Type: unsigned int

The SOUT VTREG represents the serial output from the simulated microcontroller. Whenever the simulated serial port transmits a character, the value transmitted is automatically assigned to SOUT (which is read-only). You may read the value of SOUT to determine the character transmitted by your simulated program. For example,

SOUT

outputs the value of the last character transmitted. You may use the SOUT VTREG in a script to process transmitted data. For example,

signal void sout_sig (void) {
while (1)
  {
  wwatch(SOUT);     /* wait for something in SOUT */
  printf ("Transmitted a %2.2X\n", (unsigned) SOUT);
  }
}

STIME VTREG
Data Type: unsigned char

The STIME VTREG allows you to control the timing of the simulated serial port.

• A value of 1 (which is the default) indicates that the serial port timing is identical to the target hardware. Use this value when you want to see the effects of baud rate on the serial port I/O.
• A value of 0 indicates that all serial input and output occur instantaneously. Use this value when you don't care about any baud rate effects or when you want serial output to be fast.

For example:

STIME = 0   /* Set Serial Port for FAST timing */
STIME = 1   /* Set Serial Port for accurate timing */