µVISION DEBUGGER: Simulating Pdata Memory

Information in this article applies to:

• PK51 Version 7.01 and later

QUESTION

I have created a project using PDATA memory. I want my PDATA to be located from 0x0000-0x00FF. But, when I run the program with the µVision simulator PDATA winds up at X:0xFF00-0xFFFF. Does the µVision2 simulator correctly simulate PDATA memory accesses?

ANSWER

Yes. The µVision Simulator behaves exactly as the chip.

Most 8051 devices use the value of Port 2 as the high address byte for PDATA memory access (MOVX @Rx). The 16-bit address is created using P2 and R0 or R1. After reset, the value of P2 is 0xFF. So, PDATA memory accesses are to the address range 0xFF00-0xFFFF. This is the default behavior of the µVision simulator.

In order for the µVision simulator to access PDATA memory from 0x0000-0x00FF, you must properly configure the startup code. Refer to C51: Using PDATA Memory for more information.

Note that µVision correctly simulates PDATA access to on-chip XDATA. When you enable on-chip XRAM on NXP or Atmel devices, the MOVX R0/R1 instructions always access the memory region X:0x0000-0x00FF regardless of the value in P2.

On classic 8051 devices, the PPAGE VTREG allows you to specify the PDATA page to use or the SFR register that contains the PDATA page. For example:

PPAGE=0xFFFFFFFF // Use default behavior for MOVX @Rx
                 // (get upper address byte from P2)

PPAGE=0x10       // MOVX @Rx addresses X:0x10??
PPAGE=0x38       // MOVX @Rx addresses X:0x38??

PPAGE=D:0x95     // Use the SFR at D:0x95 as the
                 // page register for MOVX @Rx

SEE ALSO

• C51: Configuring PPAGE and PPAGEENABLE
• C51: Using PDATA Memory
• C51: Using PDATA Variables on Infineon XC800
• µVision DEBUGGER: Simulating Banked XDATA / FAR Memory

Last Reviewed: Tuesday, January 12, 2021