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Atmel T83C5101

The Atmel T83C5101 is an 8051 based CMOS controller with Dual DPTR, enhanced UART, 66 MHz High-Speed Architecture, X2 function, 16+2/6 I/O lines, 3 Timers/Counters, 6 Interrupts/4 priority levels 16K ROM, 256 Bytes on-chip RAM, additional 256 Bytes XRAM.

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Data Sheets
Architectural Overview for the Atmel T83C5101
Architectural Overview
227,495 bytes
Data Sheet for the Atmel T83C5101
Data Sheet
253,631 bytes
Hardware Description for the Atmel T83C5101
Hardware Description
428,668 bytes
Programmer's Guide for the Atmel T83C5101
Programmer's Guide
246,346 bytes

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Simulated Features

The following on-chip peripherals are simulated by the Keil Software µVision Debugger.

AGSI Drivers

The following AGSI Drivers are available for the Keil Software µVision Simulator.

AGDI Drivers

The following AGDI Drivers are available for the Keil Software µVision Debugger.

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