Bit position and mask macros. More...

Macros
#define	DFSR_CM_Pos 13U
	DFSR: CM Position. More...

#define	DFSR_CM_Msk (1UL << DFSR_CM_Pos)
	DFSR: CM Mask. More...

#define	DFSR_Ext_Pos 12U
	DFSR: Ext Position. More...

#define	DFSR_Ext_Msk (1UL << DFSR_Ext_Pos)
	DFSR: Ext Mask. More...

#define	DFSR_WnR_Pos 11U
	DFSR: WnR Position. More...

#define	DFSR_WnR_Msk (1UL << DFSR_WnR_Pos)
	DFSR: WnR Mask. More...

#define	DFSR_LPAE_Pos 9U
	DFSR: LPAE Position. More...

#define	DFSR_LPAE_Msk (1UL << DFSR_LPAE_Pos)
	DFSR: LPAE Mask. More...

#define	DFSR_FS1_Pos 10U
	DFSR: FS1 Position. More...

#define	DFSR_FS1_Msk (1UL << DFSR_FS1_Pos)
	DFSR: FS1 Mask. More...

#define	DFSR_Domain_Pos 4U
	DFSR: Domain Position. More...

#define	DFSR_Domain_Msk (0xFUL << DFSR_Domain_Pos)
	DFSR: Domain Mask. More...

#define	DFSR_FS0_Pos 0U
	DFSR: FS0 Position. More...

#define	DFSR_FS0_Msk (0xFUL << DFSR_FS0_Pos)
	DFSR: FS0 Mask. More...

#define	DFSR_STATUS_Pos 0U
	DFSR: STATUS Position. More...

#define	DFSR_STATUS_Msk (0x3FUL << DFSR_STATUS_Pos)
	DFSR: STATUS Mask. More...

Description

Macro Definition Documentation

#define DFSR_CM_Msk (1UL << DFSR_CM_Pos)

#define DFSR_CM_Pos 13U

#define DFSR_Domain_Msk (0xFUL << DFSR_Domain_Pos)

#define DFSR_Domain_Pos 4U

#define DFSR_Ext_Msk (1UL << DFSR_Ext_Pos)

#define DFSR_Ext_Pos 12U

#define DFSR_FS0_Msk (0xFUL << DFSR_FS0_Pos)

#define DFSR_FS0_Pos 0U

#define DFSR_FS1_Msk (1UL << DFSR_FS1_Pos)

#define DFSR_FS1_Pos 10U

#define DFSR_LPAE_Msk (1UL << DFSR_LPAE_Pos)

#define DFSR_LPAE_Pos 9U

#define DFSR_STATUS_Msk (0x3FUL << DFSR_STATUS_Pos)

#define DFSR_STATUS_Pos 0U

#define DFSR_WnR_Msk (1UL << DFSR_WnR_Pos)

#define DFSR_WnR_Pos 11U