PPAGE VTREG

Most 8051 devices use the value of Port 2 as the high address byte for PDATA memory access (MOVX @Rx). The 16-bit address is created using P2 and R0 or R1. After reset, the value of P2 is 0xFF. So, PDATA memory accesses refer to the address range 0xFF00-0xFFFF. This is the default behavior of the µVision simulator.

In order for the µVision Simulator to access PDATA memory from 0x0000-0x00FF, you must properly configure the startup code. µVision simulates correctly PDATA access to on-chip XDATA.

When you enable on-chip XRAM on Philips or Atmel devices, the MOVX R0/R1 instructions always access the memory region X:0x0000-0x00FF regardless of the value in P2.

On classic 8051 devices, the PPAGE VTREG allows you to specify the PDATA page to use or the SFR register that contains the PDATA page. For example:

• PPAGE=0xFFFFFFFF: Use default behavior for MOVX @Rx (get upper address byte from P2)
• PPAGE=0x10: MOVX @Rx addresses X:0x10??
• PPAGE=0x38: MOVX @Rx addresses X:0x38??
• PPAGE=D:0x95 Use the SFR at D:0x95 as the page register for MOVX @Rx

Note

• Refer to article µVISION DEBUGGER: SIMULATING PDATA MEMORY for further information.